Deep|Optics: 6D Torus Points to a 4x Uplift in Optical Content per TPU

Key takeaway

Supply-chain rumors suggest Google's training-oriented TPU 9t might raise the torus dimensionality to 6D while retaining the torus architecture, with deployment targeted for 2027–2028. If realized, wrap-around optical ports per TPU on the scale-up side would rise from 1.5 (3D) to 6, a fourfold increase in OCS ports and optical module content per TPU; combined with the 800G→2.4T Coherent Lite speed and modulation upgrade, the value uplift would exceed 4x. The direction is consistent with the two evolution paths we laid out in our earlier report, Deep|AI Infra 2026: Shifting from “Brain Power” Competition to “Whole-Body” Evolution

I. The Two Evolution Paths from Our Earlier Report

In our earlier report, we argued that, in the agent era, the system bottleneck is shifting from single-chip compute to system-wide communication efficiency. MoE shifts the communication pattern from All-Reduce toward bisection-bandwidth-hungry All-to-All. Per the GShard paper, as experts scale from 128 to 2,048, All-to-All time for MoE dispatch/combine rises from 16% to 36% of MoE + Transformer layer execution time. On that basis, we expected Google to push along two lines:

1. Scale-out expansion: the number of in-rack TH6 switches rises from one to four–six per rack, DCN bandwidth up 4–6x, the scale-out OCS port ratio moves from 0.2:1 to 1:1, and the optical module ratio increases from 1:1–1:2 to 1:3–1:4;
2. Scale-up dimensionality: a 3D torus's bisection bandwidth grows only as N^(2/3); assuming the torus architecture is retained, adding dimensions is the main practical route to higher bisection bandwidth, with the OCS Port-to-xPU ratio rising from 1.5:1 toward 2:1–10:1.